Japanese Unexamined Patent Application Publication No. 2004-228375 (Patent Document 1) discloses a method of forming bumps when a semiconductor is joined to a substrate with the bumps interposed between them. FIG. 1 is a schematic sectional view illustrating a related-art method of manufacturing an electronic component module. In Patent Document 1, as illustrated in FIG. 1(a), a bump 6 is formed on a surface electrode 10 of a substrate 9 by ejecting a metal paste 4 from an ink head 3 and by drying the metal paste 4.
Next, as illustrated in FIG. 1(b), outer terminals 2 of a bare IC (i.e., an electronic component provided with outer terminals) 1 are aligned to face the bumps 6 on the substrate 9, respectively. Furthermore, as illustrated in FIG. 1(c), the bare IC 1 is placed on the substrate 9, and the outer terminals 2 are joined to the bumps 6, respectively, by applying pressure and heat to such an extent that the bumps 6 are deformed. The bare IC 1 is thus mounted to the substrate 9.